1. Field of the Invention
The present invention relates to a current-mode differential signal transmitting circuit, and more particularly, to a current-mode differential signal transmitting circuit sharing a clock output unit.
2. Description of the Prior Art
Current-mode differential signal transmitting circuits are utilized for comparing the current or voltage of the input signals. For example, low voltage differential signaling (LVDS) transmitting circuits and reduced swing differential signal (RSDS) transmitting circuits are well-known by those of average skill in the art and are types of current-mode differential signal transmitting circuits.
FIG. 1 illustrates a prior art current mode differential signal transmitting circuit. As shown in FIG. 1, the current-mode differential signal transmitting circuit 100 includes a transmitter 102 and a receiver 104, wherein the transmitter 102 includes a first transmitting module 103 and a second transmitting module 105 and the receiver 104 includes a first receiving module 107 and a second receiving module 109. As shown in FIG. 1, the current-mode differential signal transmitting circuit transmits data by using a conventional dual-port connection, wherein the first transmitting module 103 corresponds to the first receiving module 107 and the second transmitting module 105 corresponds to the second receiving module 109. The first transmitting module 103 and the second transmitting module 105 include the same circuit structures, and the first receiving module 107 and the second receiving module 109 includes the same circuit structures.
The first transmitting module 103 includes a plurality of first outputting units 103a through 103d and a first clock outputting unit 110, and the second transmitting module 105 also includes a plurality of second outputting units 105a through 105d and a second clock outputting unit 112. The first outputting units 103a through 103d are used for outputting data to the receiver 104, and the clock outputting units 110 and 112 are used for outputting data transmitting clock signals C1 and C2 corresponding to data. However, each transmitting module of the above mentioned transmitting circuit includes a clock outputting unit, and the number of the clock outputting units increase as the number of the transmitting modules increase, thus the demand for pins also increases, and which does not meet the requirement of the desired device with minimized components. A novel transmitting circuit is needed to solve the above-mentioned problems.